…

Crappy week. Yessiree.

I counted approx. 14 hours of sleep since Sunday 8 AM.

So, a single input NAND gate is equivalent to an inverter. >_< But do I draw it as an inverter or as a NAND gate? I mean, Glen did specify that we were supposed to draw the "function" instead of the physical gate... And then you have the logic equations... Do you write them for activeness or for logic levels? x_x It seems both works, but I seem to get different replies from TAs and from my prof (miscommunication? >_<). @_@

And I guess I got something terribly wrong, because I didn’t reuse logic. -_-

Crap. At this point, I don’t care if I do well in my other classes. I have to do well in this class. @_@

…Since it seems things are getting kind of hopeless. I’m being totally pwned by my sets.

lol… I think I’ve been replaced. Now I’m just a third wheel. =\